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| Management number | 231604347 | Release Date | 2026/06/18 | List Price | US$37.78 | Model Number | 231604347 | ||
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This book discusses the trade-offs involved in designing direct RF digitization receivers for the radio frequency and digital signal processing domains. A system-level framework is developed, quantifying the relevant impairments of the signal processing chain, through a comprehensive system-level analysis. Special focus is given to noise analysis (thermal noise, quantization noise, saturation noise, signal-dependent noise), broadband non-linear distortion analysis, including the impact of the sampling strategy (low-pass, band-pass), analysis of time-interleaved ADC channel mismatches, sampling clock purity and digital channel selection. The system-level framework described is applied to the design of a cable multi-channel RF direct digitization receiver. An optimum RF signal conditioning, and some algorithms (automatic gain control loop, RF front-end amplitude equalization control loop) are used to relax the requirements of a 2.7GHz 11-bit ADC. A two-chip implementation is presented, using BiCMOS and 65nm CMOS processes, together with the block and system-level measurement results. Readers will benefit from the techniques presented, which are highly competitive, both in terms of cost and RF performance, while drastically reducing power consumption. Read more
| ISBN10 | 3319345338 |
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| ISBN13 | 978-3319345338 |
| Edition | Softcover reprint of the original 1st ed. 2014 |
| Language | English |
| Publisher | Springer |
| Dimensions | 6.1 x 0.43 x 9.25 inches |
| Item Weight | 11.8 ounces |
| Print length | 178 pages |
| Part of series | Analog Circuits and Signal Processing |
| Publication date | August 27, 2016 |
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